01 Home

Hi, I'm

Krishang Sarkar

Computer Engineering Student

Computer Engineering student interested in embedded systems, software engineering, and analog electronics.

View Projects Get in Touch

02 About

I'm a second-year Computer Engineering student interested in how hardware and software come together. I enjoy building projects across embedded systems, software, electronics, and signal processing while exploring different areas of engineering.

When I'm not studying or building projects, you'll usually find me running, travelling, or documenting my life.

03 Skills

Languages

C C++ Python Java MATLAB C# JavaScript HTML/CSS VHDL Bash

Embedded & Hardware

ESP32 ESP32-CAM Raspberry Pi Raspberry Pi Pico Arduino I2C SPI UART GPIO PWM ADC Wi-Fi SoftAP SMD Soldering Through-Hole Soldering

Web & Backend

React Next.js FastAPI REST APIs HTTP GraphQL Apollo Client Faust.js WordPress Gutenberg Headless CMS

Signal & Image Processing

FFT DFT DCT Frequency Analysis Digital Filtering Interpolation Compression Signal Processing Image Processing

Libraries & Frameworks

NumPy SciPy Pandas Matplotlib SymPy React Next.js FastAPI Apollo Client Faust.js

EDA & Simulation

LTspice ngspice EAGLE ModelSim Quartus

Developer Tools

Git GitHub Docker VS Code PlatformIO Arduino IDE IntelliJ IDEA PyCharm npm Jupyter Notebooks Jira Confluence GraphiQL LocalWP

Lab Equipment

Oscilloscope Digital Multimeter LCR Bridge DC Power Supply Breadboarding

Platforms & Systems

Linux Linux CLI SSH Embedded Systems HTTP Servers Hardware/Software Interfacing <

Architecture & Methods

Real-Time Firmware Architecture State Machines Non-Blocking Timing Headless CMS Architecture Agile Scrum Kanban Serial Debugging Component-Level Testing

04 Experience

[Feb-2026] Blueprint

Software Developer

Developing and maintaining nonprofit web platforms at SFU Blueprint using modern web technologies and headless CMS architecture.

Developed nonprofit web platforms using Next.js, Faust.js, Apollo Client, GraphQL, and WordPress in a headless CMS architecture.
Implemented responsive UI components using React, CSS, and WordPress Gutenberg to improve cross-platform consistency.
Debugged frontend workflows using LocalWP, analyzed component behavior, and collaborated through GitHub pull requests and Agile workflows.
Built reusable Gutenberg components and evaluated plugin integrations to improve maintainability of client platforms.

Next.js React Faust.js GraphQL Apollo Client WordPress Gutenberg GitHub

05 Projects

Embedded Systems / Wearable Technology

Kinetiq

Built a wearable fall-alert prototype using two BBC micro:bits to detect potential falls and wirelessly notify a caregiver.
Developed accelerometer-based fall detection, step counting, manual SOS alerts, and status transmission using the micro:bit radio protocol.
Integrated a receiving bracelet with vibration and audible feedback, connection monitoring, and a transistor-based motor driver with flyback protection.
Helped integrate and test the wireless system while managing the Git/GitHub workflow, technical documentation, and StormHacks Devpost submission.

BBC micro:bit TypeScript Microsoft MakeCode Accelerometer Radio GPIO Git/GitHub

GitHub ↗ Devpost ↗

Full-Stack Software

ReelBridge

Built a full-stack application that converts Instagram Reel URLs into downloadable MP4 files for sharing outside Instagram.
Developed a React frontend and FastAPI backend, integrating yt-dlp and FFmpeg for media retrieval and processing.
Containerized the application with Docker and redesigned the delivery architecture after identifying platform DM restrictions.

FastAPI React.js Docker yt-dlp FFmpeg

GitHub ↗

C++ Software

AKK-Jack

Developed core game logic for a terminal-based Blackjack application in C++ using object-oriented design.
Implemented modular Card, Deck, and Hand classes for card representation, deck generation, shuffling, dealing, and hand management.
Built Blackjack evaluation logic for card values, bust detection, natural blackjack, split eligibility, and reusable hand-state operations.

C++ OOP STL FTXUI Git

FPGA & Digital Design

Digital Alarm Clock — ENSC 252 Final Project

Implemented a synchronous RTL design in VHDL using modular HDL architecture across 10 source files, integrating sequential and combinational logic blocks into a structural top-level entity synthesized on the DE10-Lite FPGA.
Authored the DigitalClockControl RTL block implementing a 3-state Moore FSM (Display Time → Set Time → Set Alarm) with registered state transitions, field-select/increment logic for HH:MM:SS, soft reset, and alarm comparison.
Designed a PreScale clock divider reducing the 50 MHz system clock to ∼1.49 Hz via a 25-bit ripple counter and MSB extraction, producing a 1 Hz synchronous tick for all downstream sequential logic.
Verified RTL functionality of each submodule independently via ModelSim testbenches before integrating into the top-level netlist; validated post-synthesis behaviour through live board demonstration

Digital Logic VHDL FPGA RTL ModelSim

Signal Processing & RF

AM Radio Receiver — ENSC 220

Assembled a functional AM radio receiver on a breadboard comprising an LC tank tuning circuit, germanium diode envelope detector, RC low-pass filter, and single-supply op-amp audio amplifier.
Tuned the LC resonant circuit using a ferrite rod and variable capacitor to successfully receive 4 live AM broadcast stations, demonstrating practical understanding of resonance, impedance matching, and carrier selectivity.
Developed hands-on intuition for analog signal processing from RF signal capture through demodulation to audio output, bridging theoretical circuit analysis with real-world analog design.

Analog Signal Processing Radio Frequency (RF)

Digital Signal Processing

ECG Signal Processing & QRS Detection

Developed a biomedical DSP pipeline for PTB-XL Lead II ECG recordings, implementing Butterworth, Chebyshev Type I, and Chebyshev Type II bandpass filters with zero-phase filtering.
Implemented a Pan–Tompkins-style QRS detector using differentiation, squaring, moving-window integration, thresholding, and R-peak refinement to extract RR intervals and estimate heart rate.
Built a reproducible experiment comparing four preprocessing configurations across 20 ECG recordings (80 runs), incorporating Welch PSD analysis, visualization, automated result export, and testing.

Python SciPy NumPy pandas WFDB Matplotlib

GitHub ↗

Embedded Systems

ESP32 Basketball Scoreboard System

Developed an ESP32-based real-time scoreboard in C++, implementing state-driven firmware and non-blocking timing using millis().
Interfaced a 128×64 OLED over I2C, GPIO buttons, and a buzzer with software debouncing; debugged firmware using Serial logging and component-level hardware testing.
Configured ESP32 Wi-Fi SoftAP with an HTTP interface for remote game configuration and real-time timer updates.

Embedded Systems C ESP32 I2C GPIO Wi-Fi

Numerical Computing

Calculus Solver & Graphing Tool

Developed a Python script using the SymPy library to automate basic calculus tasks like differentiation and integration for user-defined functions.
Built a visualization feature with Matplotlib that generates 2D plots of functions alongside their derivatives to help visually verify mathematical results
Used NumPy to handle numerical ranges and coordinate arrays, ensuring smooth curves and accurate data points on every graph

NumPy Numerical Analysis Python SymPy Matplotlib

Web Development & Electronics

ELECTRO PEDIA!

Created a website dedicated to educating others about electronic components
Gained experience in web development and content creation

Electronics Markup Languages

Live Site ↗

06 Achievements

Mar 2026

SFU Faculty of Applied Sciences Competition

Finalist — Team Martian Mentors (Top 12 of 60 Teams)

Burnaby, BC

Selected as a Top 12 finalist among 60 teams in a faculty-wide engineering design competition.
Designed an interactive STEM demonstration combining sensors, mechanical systems, and applied science concepts.
Prototyped interdisciplinary experiments involving solar energy, magnetic systems, algorithms, and electrical communication.

Jan 2026

Western Engineering Competition (WEC)

SFU Junior Design Representative

Edmonton, AB

Selected to represent SFU Burnaby at the Western Canada regional level after securing 1st place in the internal university qualifier.
Designed and prototyped a sustainable greenhouse solution focused on energy efficiency under strict time and material constraints.
Applied engineering design and technical communication principles during the project defense.

Nov 2025

SFU Engineering Competition (SFU-EC)

1st Place SFU Burnaby — Junior Design Category

Burnaby, BC

Designed a Multi-Purpose Fast Filtration System focused on the theme of water conservation.
Engineered a two-stage filtration process using parallel channels to produce both potable and non-potable water, integrating fluid dynamics.

07 Contact